This page describes the addressing modes and instructions available on the Intel 8080 processor.
Addressing Modes
The 8080 has 5 addressing modes which determine how operands are provided to the instruction.
Implied Addressing
One or more of the operands is implied by the instruction.
Register Addressing
Operand is a specified register.
Immediate Addressing
Operand is a value encoded as part of the instruction.
Direct Addressing
Address to load the operand from is encoded as part of the instruction
Register Indirect Addressing
Address to load the operand from is specified in a register pair.
Note that the M operand indicates the value at the address specified by the H/L register pair.
Instruction Formats
Note that these are unofficial formats based on grouping the instructions by how operands are encoded
Fields
Opcode
The opcode is used to determine which operation is executed
Source (SSS) and Destination (DDD)
Indicates the source or destination respectively, all options are single registers except for Memory (M) which indicates the location specified by the address contained in the H/L register pair
000 – Register B
001 – Register C
010 – Register D
011 – Register E
100 – Register H
101 – Register L
110 – M
111 – Accumulator
Code (CCC)
Specifies an interrupt code used
Register Pair (RR)
Indicates a register pair
00 – B/C Register Pair
01 – D/E Register Pair
10 – H/L Register Pair
11 – Stack Pointer (SP) or Program Status Word (PSW)
Limited Register Pair (p)
Indicates a register pair but with limited options
0 – B/C Register Pair
1 – D/E Register Pair
Data
Represents an integer value, 8 bits for memory or single register instructions, 16 bits for register pair instructions
Address
A 16-bit address stored low byte first
Formats
Format I - Implied
Format II - Immediate
Format III - Immediate Address
| 7 0 |
| Op Code |
| Low Address Byte |
| High Address Byte |
Format IV - Source Operand
Format V - Destination Operand
| 7 6 | 5 3 | 2 0 |
| Op Code | DDD | Op Code |
Format VI - Destination and Immediate
| 7 6 | 5 3 | 2 0 |
| Op Code | DDD | Op Code |
| Data |
Format VII - Code
| 7 6 | 5 3 | 2 0 |
| Op Code | CCC | Op Code |
Format VIII - Destination and Source
| 7 6 | 5 3 | 2 0 |
| Op Code | DDD | SSS |
Format IX - Register Pair
| 7 6 | 5 4 | 3 0 |
| Op Code | RP | Op Code |
Format X - Register Pair and Immediate
| 7 6 | 5 4 | 3 0 |
| Op Code | RP | Op Code |
| Low-Order Data |
| High-Order Data |
Format XI - Limited Register Pair Indirect
| 7 5 | 4 | 3 0 |
| Op Code | r | Op Code |
Instructions
Note that opcodes represent the value if all of the encoded operand bits were 0
Operands
Register (reg)
Specifies a register
Memory (m)
Specifies the memory location pointed to by the H/L register pair
Register Pair (regPair)
Specifies a register pair by indicating the name of the first register
data
A value specified as part of the instruction
address
An address specified as part of the instruction
port
Input/Output port
code
Interrupt service routine code
Data Transfer Instructions
Move Immediate (MVI)
Moves the immediate value to the location specified
| Instruction | Format | Binary Opcode | Octal | Hex |
MVI Reg, data
MVI M, data | VI | 00000110 | 006 | 06 |
Store Accumulator Direct (STA)
Stores the value of the accumulator at the specified address
| Instruction | Format | Binary Opcode | Octal | Hex |
| STA address | III | 00110010 | 062 | 32 |
Load Accumulator Direct (LDA)
Loads the accumulator with the value at the specified address
| Instruction | Format | Binary Opcode | Octal | Hex |
| LDA address | III | 00111010 | 072 | 3A |
Move (MOV)
Moves the value specified by the second operand to the location specified by the first operand
| Instruction | Format | Binary Opcode | Octal | Hex |
MOV reg, reg
MOV M, reg
MOV reg, M | VIII | 01000000 | 100 | 40 |
Register Pair Data Transfer Instructions
Load Register Pair Immediate (LXI)
Loads the specified register pair with the immediate value
| Instruction | Format | Binary Opcode | Octal | Hex |
LXI regPair data
LXI SP data | X | 00000001 | 001 | 01 |
Store Accumulator Indirect (STAX)
Stores the value in the accumulator at the address specified by register pair B/C or D/E
| Instruction | Format | Binary Opcode | Octal | Hex |
| STAX regPair | XI | 00000010 | 002 | 02 |
Load Accumulator Indirect (LDAX)
Loads the accumulator with the value at the address specified by register pair B/C or D/E
| Instruction | Format | Binary Opcode | Octal | Hex |
| LDAX regPair | XI | 00001010 | 012 | 0A |
Store H and L Direct (SHLD)
Stores the value of L at the specified address. Stores the value of H at the specified address plus one
| Instruction | Format | Binary Opcode | Octal | Hex |
| SHLD address | III | 00100010 | 042 | 22 |
Load H and L Direct (LHLD)
Loads L with the value at the specified address. Loads H with the value at the specified address plus one
| Instruction | Format | Binary Opcode | Octal | Hex |
| LHLD address | III | 00101010 | 052 | 2A |
Exchange H and L with D and E (XCHG)
Exchanges the value in H/L register pair with the value in D/E register pair
| Instruction | Format | Binary Opcode | Octal | Hex |
| XCHG | I | 11101011 | 353 | EB |
Addition Instructions
Addition instructions add values to the accumulator. The carry flag is set based on the result of the operation so it can be used for chained multi-byte addition.
Add
Adds the specified value to the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
ADD reg
ADD M | IV | 10000000 | 200 | 80 |
Add with Carry (ADC)
Adds the specified value and the carry flag to the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
ADC reg
ADC M | IV | 10001000 | 210 | 88 |
Add Immediate (ADI)
Adds the immediate value to the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| ADI data | II | 11000110 | 306 | C6 |
Add Immediate with Carry (ACI)
Adds the immediate value and the carry flag to the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| ACI data | II | 11001110 | 316 | CE |
Subtraction Instructions
Subtraction is performed using 2’s Complement addition. The value to be subtracted is converted to it’s opposite sign value and then added to the accumulator. For example 5 (00000101) would be converted to (11111011) –5 and then added to the accumulator. The carry flag is complemented to generate a borrow flag that can be used for chained multi-byte subtraction.
Subtract (SUB)
Subtracts the specified value from the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
SUB reg
SUB M | IV | 10010000 | 220 | 90 |
Subtract with Borrow (SBB)
Subtracts the specified value and the carry (borrow) flag from the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
SBB reg
SBB M | IV | 10011000 | 230 | 98 |
Subtract Immediate (SUI)
Subtracts the immediate value from the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| SUI data | II | 11010110 | 326 | D6 |
Subtract Immediate with Borrow (SBI)
Subtracts the immediate value and the carry (borrow) flag from the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| SBI data | II | 11011110 | 336 | DE |
Increment/Decrement Instructions
Increment (INR)
Adds 1 to the specified location
| Instruction | Format | Binary Opcode | Octal | Hex |
INR reg
INR M | V | 00000100 | 004 | 04 |
Decrement (DCR)
Subtracts 1 from the specified location
| Instruction | Format | Binary Opcode | Octal | Hex |
DCR reg
DCR M | V | 00000101 | 005 | 05 |
Register Pair Arithmetic Instructions
Increment Register Pair (INX)
Adds 1 to the specified register pair
| Instruction | Format | Binary Opcode | Octal | Hex |
INX regPair
INX SP | IX | 00000011 | 003 | 03 |
Double Register Add (DAD)
Adds the value in the specified register pair to H/L
| Instruction | Format | Binary Opcode | Octal | Hex |
DAD regPair
DAD SP | IX | 00001001 | 011 | 09 |
Decrement Register Pair (DCX)
Subtracts 1 from the specified register pair
| Instruction | Format | Binary Opcode | Octal | Hex |
DCX regPair
DCX SP | IX | 00001011 | 013 | 0B |
BCD Instructions
Binary Coded Decimal values use 4 bits to encode the decimal values 0 to 9.
Decimal Adjust Accumulator (DAA)
Adjusts the value in the accumulator to ensure it contains two 4-bit BCD values
| Instruction | Format | Binary Opcode | Octal | Hex |
| DAA | I | 00100111 | 047 | 27 |
Rotate Instructions
Rorate Accumulator Left (RLC)
Sets the carry flag to the most significant bit of the accumulator. Rotates the bits of the accumulator to the left by one bit with the most significant bit becoming the least significant bit.
| Instruction | Format | Binary Opcode | Octal | Hex |
| RLC | I | 00000111 | 007 | 07 |
Rotate Accumulator Right (RRC)
Sets the carry flag to the least significant bit of the accumulator. Rotates the bits of the accumulator to the right by one bit with the least significant bit becoming the most significant bit.
| Instruction | Format | Binary Opcode | Octal | Hex |
| RRC | I | 00001111 | 017 | 0F |
Rotate Left Through Carry (RAL)
Rotates the bits of the accumulator to the left by one bit. The most significant bit of the accumulator is moved to the carry flag and the previous value of the carry flag is moved to the least significant bit of the accumulator.
| Instruction | Format | Binary Opcode | Octal | Hex |
| RAL | I | 00010111 | 027 | 17 |
Rotate Right Through Carry (RAR)
Rotates the bits of the accumulator to the right by one bit. The least significant bit of the accumulator is moved to the carry flag and the previous value of the carry flag is moved to the most significant bit of the accumulator.
| Instruction | Format | Binary Opcode | Octal | Hex |
| RAR | I | 00011111 | 037 | 1F |
Logical Instructions
Complement Accumulator (CMA)
Complements the accumulator, flipping each bit to the opposite value
| Instruction | Format | Binary Opcode | Octal | Hex |
| CMA | I | 00101111 | 057 | 2F |
Logical AND with Accumulator (ANA)
ANDs the specified value with the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
ANA Reg
ANA M | IV | 10100000 | 240 | A0 |
Exclusive OR with Accumulator (XRA)
Exclusive ORs the specified value with the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
XRA reg
XRA M | IV | 10101000 | 250 | A8 |
Inclusive OR with Accumulator (ORA)
ORs the specified value with the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
ORA reg
ORA M | IV | 10110000 | 260 | B0 |
AND Immediate with Accumulator (ANI)
ANDs the immediate value with the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| ANI data | II | 11100110 | 346 | E6 |
Exclusive OR Immediate with Accumulator (XRI)
Exclusive ORs the immediate value with the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| XRI data | II | 11101110 | 356 | EE |
Inclusive OR Immediate with Accumulator (ORI)
ORs the immediate value with the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| ORI data | II | 11110110 | 366 | F6 |
Carry Instructions
Set Carry (STC)
Sets the carry flag
| Instruction | Format | Binary Opcode | Octal | Hex |
| STC | I | 00110111 | 067 | 37 |
Complement Carry (CMC)
Complements the carry flag, flipping it to the opposite value
| Instruction | Format | Binary Opcode | Octal | Hex |
| CMC | I | 00111111 | 077 | 3F |
Compare Instructions
Compare instructions subtract the specified value from the accumulator and use the result to set the condition flags. Neither the source or the accumulator is modified.
If the zero flag is set then the values are equal.
If the two values have the same sign then the carry flag being set indicates that the value being compared is greater than the value in the accumulator otherwise the value in the accumulator is greater.
If the two values have different signs then the carry flag being indicates that the value in the accumulator is greater otherwise the value being compared is greater.
Compare with Accumulator (CMP)
Compares the specified value against the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
CMP reg
CMP M | IV | 10111000 | 270 | B8 |
Compare Immediate (CPI)
Compares the immediate value against the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| CPI data | II | 11111110 | 376 | FE |
Jump Instructions
Jump instructions set the PC to the address specified. Conditional jump instructions only jump if the specified condition is met.
Jump if Not Zero (JNZ)
Jump if zero flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| JNZ address | III | 11000010 | 302 | C2 |
Jump (JMP)
Unconditional Jump
| Instruction | Format | Binary Opcode | Octal | Hex |
| JMP address | III | 11000011 | 303 | C3 |
Jump if Zero (JZ)
Jump if zero flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| JZ address | III | 11001010 | 312 | CA |
Jump if No Carry (JNC)
Jump if carry flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| JNC address | III | 11010010 | 322 | D2 |
Jump if Carry (JC)
Jump if carry flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| JC address | III | 11011010 | 332 | DA |
Jump if Parity Odd (JPO)
Jump if parity flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| JPO address | III | 11100010 | 342 | E2 |
Jump if Parity Even (JPE)
Jump if parity flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| JPE address | III | 11101010 | 352 | EA |
Jump if Positive (JP)
Jump if sign flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| JP address | III | 11110010 | 362 | F2 |
Jump if Minus (JM)
Jump if sign flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| JM address | III | 11111010 | 372 | FA |
Call Instructions
Call instructions push the PC onto the stack and then set the PC to the address specified. Conditional Call instructions only Call if the specified condition is met.
Call if Not Zero (CNC)
Call if zero flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| CNZ address | III | 11000100 | 304 | C4 |
Call if Zero (CZ)
Call if zero flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| CZ address | III | 11001100 | 314 | CC |
CALL
Unconditional Call
| Instruction | Format | Binary Opcode | Octal | Hex |
| CALL address | III | 11001101 | 315 | CD |
Call if No Carry (CNC)
Call if carry flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| CNC address | III | 11010100 | 324 | D4 |
Call if Carry (CC)
Call if carry flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| CC address | III | 11011100 | 334 | DC |
Call if Parity Odd (CPO)
Call if parity flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| CPO address | III | 11100100 | 344 | E4 |
Call if Parity Even (CPE)
Call if parity flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| CPE address | III | 11101100 | 354 | EC |
Call if Positive (CP)
Call if sign flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| CP address | III | 11110100 | 364 | F4 |
Call if Minus (CM)
Call if sign flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| CM address | III | 11111100 | 376 | FC |
Return Instructions
Return instructions pop the PC off of the stack and start executing at that address. Conditional return instructions only Return if the specified condition is met.
Return if Not Zero (RNZ)
Return if zero flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| RNZ | I | 11000000 | 300 | C0 |
Return if Zero (RZ)
Return if zero flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| RZ | I | 11001000 | 310 | C8 |
Return from Subroutine (RET)
Unconditional Return
| Instruction | Format | Binary Opcode | Octal | Hex |
| RET | I | 11001001 | 311 | C9 |
Return if No Carry (RNC)
Return if carry flag is clear
| Instruction | Format | Binary Opcode | Octal | Hex |
| RNC | I | 11010000 | 320 | D0 |
Return if Carry (RC)
Return if carry flag is set
| Instruction | Format | Binary Opcode | Octal | Hex |
| RC | I | 11011000 | 330 | D8 |
Return if Parity Odd (RPO)
Return if parity flag is clear (Odd)
| Instruction | Format | Binary Opcode | Octal | Hex |
| RPO | I | 11100000 | 340 | E0 |
Return if Parity Even (RPE)
Return if parity flag is set (Even)
| Instruction | Format | Binary Opcode | Octal | Hex |
| RPE | I | 11101000 | 350 | E8 |
Return if Positive (RP)
Return if sign flag is clear (Positive)
| Instruction | Format | Binary Opcode | Octal | Hex |
| RP | I | 11110000 | 360 | F0 |
Return if Minus (RM)
Return if sign flag is set (Minus)
| Instruction | Format | Binary Opcode | Octal | Hex |
| RM | I | 11111000 | 370 | F8 |
Program Counter Instructions
Setting the program counter to a specific value effectively results in a jump to that address
Move H and L to Program Counter (PCHL)
Sets the PC to the value in the H and L Register Pair
| Instruction | Format | Binary Opcode | Octal | Hex |
| PCHL | I | 11101001 | 351 | E9 |
Restart (RST)
Executes a Call to the address specified by the provided Code multiplied by 8.
| Instruction | Format | Binary Opcode | Octal | Hex |
| RST code | VIII | 11000111 | 307 | C7 |
Stack Instructions
POP
Reads the value at the address specified by SP and stores it in the low register of the register pair then increments SP and reads the next value into the high register of the register pair and then Increments SP again so it points to the next value.
| Instruction | Format | Binary Opcode | Octal | Hex |
POP regPair
POP PSW | IX | 11000001 | 301 | C1 |
PUSH
Decrements SP and writes the value in the high register of the register pair to the address specified by SP then Decrements SP again and writes the value in the low register to the next address.
| Instruction | Format | Binary Opcode | Octal | Hex |
PUSH regPair
PUSH PSW | IX | 11000101 | 305 | C5 |
Exchange H and L with Top of Stack (XTHL)
Reads the value at the address specified by SP and exchanges it with the value in L and then reads the value at the address specified by SP plus one and exchanges it with the value in H. The value in SP is unchanged
| Instruction | Format | Binary Opcode | Octal | Hex |
| XTHL | I | 11100011 | 343 | E3 |
Move H and L to SP (SPHL)
Loads the contents of the H/L register pair into the SP register
| Instruction | Format | Binary Opcode | Octal | Hex |
| SPHL | I | 11111001 | 371 | F9 |
I/O Instructions
I/O instructions are used to communicate with other devices. The processor puts a copy of the I/O port number on the high and low parts of the address bus which is used to signal to the device that it should read or write data.
Output to Port (OUT)
| Instruction | Format | Binary Opcode | Octal | Hex |
| OUT port | II | 11010011 | 323 | D3 |
Writes the value in the accumulator out to the specified I/O port
Input from Port (IN)
Reads a value from the specified I/O port in to the accumulator
| Instruction | Format | Binary Opcode | Octal | Hex |
| IN port | II | 11011011 | 333 | DB |
Interrupt Instructions
Interrupts allow the processor to pause execution to handle a single byte instruction that is put on the bus by other devices. Typically this is a RST instruction which results in the CPU calling to a specific instruction specified by the code in the RST instruction. These can be used when a device wants to signal to the CPU that something happened.
Disable Interrupts (DI)
Disables interrupts for the system
| Instruction | Format | Binary Opcode | Octal | Hex |
| DI | I | 11110011 | 363 | F3 |
Enable Interrupts (EI)
Enables Interrupts for the system
| Instruction | Format | Binary Opcode | Octal | Hex |
| EI | I | 11111011 | 373 | FB |
Machine Control Instructions
No Operation (NOP)
Performs no action
| Instruction | Format | Binary Opcode | Octal | Hex |
| NOP | I | 00000000 | 000 | 00 |
Halt (HLT)
Halts the processor
| Instruction | Format | Binary Opcode | Octal | Hex |
| HLT | I | 01110110 | 166 | 76 |